11.3.7 OSCEN

Oscillator Enable Register
Name: OSCEN
Offset: 0x0211

Bit 76543210 
  HFOENMFOENLFOENSOSCENADOEN   
Access R/WR/WR/WR/WR/W 
Reset 00000 

Bit 6 – HFOEN HFINTOSC Enable

ValueDescription
1 HFINTOSC is explicitly enabled, operating as specified by OSCFRQ
0 HFINTOSC can be enabled by a peripheral request

Bit 5 – MFOEN MFINTOSC Enable

ValueDescription
1 MFINTOSC is explicitly enabled
0 MFINTOSC can be enabled by a peripheral request

Bit 4 – LFOEN LFINTOSC Enable

ValueDescription
1 LFINTOSC is explicitly enabled
0 LFINTOSC can be enabled by a peripheral request

Bit 3 – SOSCEN Secondary Oscillator Enable

ValueDescription
1 SOSC is explicitly enabled, operating as specified by SOSCPWR
0 SOSC can be enabled by a peripheral request

Bit 2 – ADOEN ADCRC Oscillator Enable

ValueDescription
1 ADCRC is explicitly enabled
0 ADCRC may be enabled by a peripheral request