15.2.2.4 NVMREG Write to DFM

DFM is programmed using the following steps:
  1. Set the NVMREGS bit.
  2. Load the NVMADRH:NVMADRL registers with the DFM address.
  3. Load the NVMDATL register with the data byte to be written.
  4. Set the WREN bit to allow write/erase cycles.
  5. Disable the GIE bit.
  6. Perform the NVM Unlock Sequence.
  7. Set the WR bit.

A single byte (0xFF) is written into the DFM location. The DFM circuitry automatically erases the memory location before performing the write operation. If the DFM address is write-protected, the WR bit will be cleared and the write operation will not take place.

While erasing/writing data memory, the CPU operation is suspended and resumes when the operation is complete. Upon completion, hardware clears the WR bit, the NVMIF bit is set, and an interrupt will occur if the NVMIE bit is also set.