Introduction
(Ask a Question)This document describes the memory controller solutions in the PolarFire® device family. The PolarFire family consists of the following FPGA devices.
- PolarFire FPGAs
- Microchip's PolarFire® FPGAs are the fifth-generation family of non-volatile FPGA devices, built on state-of-the-art 28 nm non-volatile process technology. PolarFire FPGAs deliver the lowest power at mid-range densities. PolarFire FPGAs lower the cost of mid-range FPGAs by integrating the industry’s lowest power FPGA fabric, lowest power 12.7 Gbps transceiver lane, built-in low power dual PCI Express® Gen 2 (EP/RP), and, on select data security (S) devices, an integrated low-power crypto co-processor.
- PolarFire SoC FPGAs
- Microchip's PolarFire SoC FPGAs are the fifth-generation family of non-volatile SoC FPGA devices, built on state-of-the-art 28 nm non-volatile process technology. The PolarFire SoC family offers industry's first RISC-V based SoC FPGAs capable of running Linux®. It combines a powerful 64-bit 5x core RISC-V Microprocessor Subsystem (MSS), based on SiFive’s U54-MC family, with the PolarFire FPGA fabric in a single device.
- RT PolarFire FPGAs
- Microchip's RT PolarFire® FPGAs combine our 60 years of space flight heritage with the industry’s lowest-power PolarFire FPGA family to enable new capabilities for space and mission-critical applications. RT PolarFire FPGA family includes RTPF500T, RTPF500TL, RTPF500TS, RTPF500TLS, RTPF500ZT, RTPF500ZTL, RTPF500ZTS, and RTPF500ZTLS devices.
The following table lists the memory controller IP solutions in the PolarFire family. These memory controller solutions address the high-speed data transfer requirements for a wide range of applications and code execution.
| Memory Controller | PolarFire® FPGA (MPF) | PolarFire SoC FPGA (MPFS) | RT PolarFire® FPGA (RTPF) | Description |
|---|---|---|---|---|
| Embedded MSS DDR Controller (see MSS DDR Memory Controller) | — | ✓ | — | Supports DDR3, DDR3L, DDR4, LPDDR3, and LPDDR4 memory devices. |
| PolarFire DDR IP1 (see Fabric DDR Subsystem) | ✓ | ✓ | ✓ | Supports DDR3, DDR3L, DDR4, LPDDR32 memory devices. |
| PolarFire QDR IP1 (see QDR Memory Controller) | ✓ | ✓ | ✓ | Supports QDR II+ and QDR II+ Xtreme memory devices. |
| PolarFire Octal DDR PHY1 (see Octal DDR PHY-Only Solution) | ✓ | ✓ | ✓ | Supports xSPI (JESD251), HyperBUS, and ONFI memory devices. |
Important:
- These IPs belong to the PolarFire family and can be seamlessly used in RT PolarFire and PolarFire SoC designs.
- RT PolarFire devices do not support LPDDR memories.
References
- For more information about the PolarFire SoC MSS, see PolarFire SoC FPGA MSS Technical Reference Manual .
- For information about configuring the MSS DDR Controller, see Standalone MSS Configurator User Guide for PolarFire SoC .
- For more information about the clocking resources, see PolarFire Family Clocking Resources User Guide .
- For more information about SmartDebug, see SmartDebug User Guide .
- For more information about PolarFire board design, see PolarFire FPGA Board Design User Guide.
- For more information about PolarFire board design, see RT PolarFire FPGA Board Design User Guide .
- For more information about PolarFire SoC board design, see PolarFire SoC FPGA Board Design Guidelines User Guide