4.5.1.2 DC Signal With Random Noise

Task: The graph is plotted in Data Visualizer using a DC signal with random noise and noise suppression is observed.
  • ADC2 computation mode: Basic
  • Input signal: DC ~1V + Random noise 0.5V peak-to-peak
Test setup:
  • Verify that LEDs D2, D3, D4, and D5 are illuminated
  • Configure the Signal & Noise Generator board to generate a DC signal of ~1V and random noise with 0.5V peak-to-peak
  • Verify the input signal using an oscilloscope. The expected result is as shown below.
Figure 4-3. Signal With Random Noise Oscilloscope Capture
Note: Figure 4-3 shows a DC offset random noise signal. The DC offset is approximately 1V, and the noise peak-to-peak magnitude is close to 500 mV.

The Data Visualizer graph is as shown in Figure 4-4. A red colored signal is noisy input signal (ADRES value), a green colored signal is the filtered signal attained using software averaging in code with 32 samples.

From the graph, it can be seen that the noise has been suppressed using a simple averaging technique. In the example source code, the averaging has been done with 32 samples.

Figure 4-4. DC Signal With Random Noise

If the signal is zoomed, the image is as shown in Figure 4-5.

Figure 4-5. Zoomed DC Signal With Random Noise

From the graph, the ADC count for a noisy signal can be seen varying from ~ 240 to 390 because of random noise. That means the ADC count is varying ±75 counts (390 to 240 → 315 ± 75 counts).

Note: The graphed signal is a noisy DC signal. The actual signal levels can vary between boards, but the result is expected to be similar to the illustrated result. In this illustration, the result is in the range of 240 to 390 ADC counts, and the noise level can be estimated to 150 ADC counts peak-to-peak.

If the signal is zoomed further, the image is as shown in Figure 4-6.

Figure 4-6. Further Zoomed DC Signal With Random Noise

ADC count for a filtered signal can be seen varying from ~ 315 to 335. That means the ADC count is varying ±10 counts (335 to 315 → 325 ± 10 counts).

Pros: Using this mode, the number of samples to be accumulated for averaging is not limited whereas it is limited to 64 for other ADC2 modes.
Note: Ideally, with 10-bit ADC and 16-bit variable for sample accumulation, the overflow will occur after accumulating 64 samples (65535/1023 = 64).

Cons: The software overhead of accumulating and averaging needs to be handled in the code.