38.5.17 Fault Event

The ADC Controller internal fault output is directly connected to the PWM fault input. The fault event may be asserted depending on the configuration of comparison registers and converted values.

Two types of comparison trigger a fault event sent to the PWM:

• The first comparison type is based on ADC_CWR settings, i.e., on all converted channels except the last one;
• The second comparison type is linked to the last channel (ADC_TEMPCWR settings) where the temperature is measured.

As an example, overcurrent and temperature values exceeding user-defined limits trigger a fault to the PWM.

When the comparison event occurs, the ADC fault output generates a pulse of one peripheral clock cycle to the PWM fault input. This fault line can be enabled or disabled within PWM. Should it be activated and asserted by the ADC Controller, the PWM outputs are immediately placed in a safe state (pure combinational path). Note that the ADC fault output connected to the PWM is not the COMPE bit. Thus, the Fault mode (FMOD) within the PWM configuration must be FMOD = 1.