38.5.18 Register Write Protection

To prevent any single software error from corrupting ADC behavior, certain registers in the address space can be write-protected by setting the bits WPEN and WPITEN in the ADC Write Protection Mode Register (ADC_WPMR).

If a write access to the protected registers is detected, the WPVS flag in the ADC Write Protection Status Register (ADC_WPSR) is set and the field WPVSRC indicates the register in which the write access has been attempted.

The WPVS flag is automatically reset by reading ADC_WPSR.

The following registers are write-protected when ADC_WPMR.WPEN is set:

• ADC Mode Register
• ADC Channel Sequence Register 1
• ADC Channel Sequence Register 2
• ADC Channel Enable Register
• ADC Channel Disable Register
• ADC Temperature Sensor Mode Register
• ADC Temperature Compare Window Register
• ADC Extended Mode Register
• ADC FIFO Mode Register
• ADC Compare Window Register
• ADC Channel Configuration Register
• ADC Analog Control Register
• ADC Trigger Register
• ADC Correction Select Register
• ADC Correction Values Register
• ADC Channel Error Correction Register

The following registers are write-protected when ADC_WPMR.WPITEN is set:

• ADC Interrupt Enable Register
• ADC Interrupt Disable Register

The following register is write-protected when ADC_WPMR.WPCREN is set:

• ADC Control Register