16.17.2.4 NFC Data Status
Name: | NFCDATA_STATUS |
Property: | Read-only |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| | | | | NFCBUSY | NFCWR | DATAEN | CSID[2] | |
Access | | | | | R | R | R | R | |
Reset | | | | | | | | | |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| CSID[1:0] | ACYCLE[2:0] | VCMD2 | CMD2[7:6] | |
Access | R | R | R | R | R | R | R | R | |
Reset | | | | | | | | | |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CMD2[5:0] | CMD1[7:6] | |
Access | R | R | R | R | R | R | R | R | |
Reset | | | | | | | | | |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CMD1[5:0] | | | |
Access | R | R | R | R | R | R | | | |
Reset | | | | | | | | | |
Bit 27 – NFCBUSY NFC Busy Status Flag
If set to true, it indicates that the NFC is
busy.
Bit 26 – NFCWR NFC Write Enable
Value | Description |
---|
0 |
NFC is
in Read mode. |
1 |
NFC is
in Write mode. |
Bit 25 – DATAEN NFC Data Phase Enable
When set to true,
the NFC data phase is enabled.
Bits 24:22 – CSID[2:0] Chip Select Identifier
Bits 21:19 – ACYCLE[2:0] Number of Address
Cycles Required for the Current Command
When ACYCLE is
different from zero, ACYCLE Address cycles are performed after Command Cycle 1.
Bit 18 – VCMD2 Valid Cycle 2 Command
When set to true, the CMD2 field is issued after the address
cycle.
Bits 17:10 – CMD2[7:0] Command Register Value for Cycle 2
When VCMD2 bit is
set to true, the Physical Memory Interface drives the IO bus with CMD2 field during
the Command Latch cycle 2.
Bits 9:2 – CMD1[7:0] Command Register
Value for Cycle 1
When a Read or Write
Access occurs, the Physical Memory Interface drives the IO bus with CMD1 field
during the Command Latch cycle 1.