74.10.3.1 ULP0, ULP1 and Idle Modes

In ULP0, ULP1 and Idle low-power modes, all device power supplies are applied within their operating range. The power reduction is achieved by reducing the frequency or stopping the clock signals of the processor and/or its peripherals.

In Idle mode, only the processor clock is stopped and all peripherals continue to operate at the same frequency. When exiting this mode, the processor operates back to full speed. Typically, a few processor clock cycles are needed to enter and exit this mode. In a Linux environment, this corresponds to Suspend-to-Idle.

In ULP0 mode, the processor is stopped and its peripherals operate at a very low frequency (from a few kHz to a few MHz). At wake-up from this mode, the processor restarts at this very low frequency. Power consumption can be optimized by reducing the frequency at the expense of a longer wake-up time. In this mode, the processor is placed in Wait-For-Interrupt (WFI) state, therefore any interrupt source can trigger a return to normal operation.

In ULP1 mode, the processor clock and the peripheral clocks are stopped. Prior to entering this mode and to stop the clocks, the source of every clock is switched to the Main RC oscillator running at a typical 12 MHz. The Power Management Controller (PMC) then stops this oscillator at ULP1 entry. Upon a wake-up event, the PMC automatically restarts this oscillator, thus clocking back the device to 12 MHz. Unlike ULP0, only the few events listed below can wake up the device. This mode achieves both a very low current consumption and a fast wake-up time of a few microseconds.

A detailed description of each mode is provided in the following sections and is followed by a power consumption section dedicated to the modes.