74.10.3.1.3 ULP1 Mode Operation

In ULP1 mode, all device power supplies are applied within their operating range. Power reduction is achieved by stopping the clock signals of the processor and/or its peripherals. The device is able to resume on wake-up events.

The following operations, based on procedures described in SDRAM Self-Refresh Mode, must be performed in this order. Code example is provided in software deliverables.

Entering ULP1 Mode

In ULP1 mode (unlike ULP0 mode) all clocks are off and the number of wake-up sources is limited to:
  • Any PIO line configured as a wake source in PMC_WCR
  • RTC alarm, RTT alarm
  • USB Resume from Suspend mode

To enter ULP1 mode:

  1. Enter SDRAM Self-refresh mode.
  2. Clear all pending events.
  3. Configure the wake-up source. RTT example:
    • Disable the interrupt for RTT.
    • Enable the RTT wake-up in the PMC Fast Start-Up Mode register (PMC_FSMR).
    • Set the RTT Alarm register (RTT_AR) to approximately 1 minute.
    • Perform an RTT Restart and enable the alarm interrupt.
  4. Suspend USB ports 0, 1 and 2.
  5. Disable all GCLK peripheral clocks.
  6. Disable PMC protection.
  7. Switch MCK0 to MAINCK.
  8. Set MDIV to 1 for MCK0.
  9. Switch the MCK source to MAINCK for all MCKs (1 to 4).
  10. Set MDIV to 1 for all MCKs (1 to 4).
  11. Turn off all eight PLLs.
  12. Turn on the Main RC.
  13. Switch MAINCK to Main RC.
  14. Turn off the Main Crystal Oscillator.
  15. Disable SYSC and SHDW write protections.
  16. Configure the expected event (RTT alarm, for example).
  17. Set Ultra Low-power 1 mode in PMC.

The system is now in ULP1 mode, waiting for the programmed event (such as RTT alarm).

Exiting ULP1 Mode

When the event occurs, recover pre-ULP1 state as follows:

  1. Start up the Main Crystal Oscillator.
  2. Switch MAINCK to Main Crystal Oscillator.
  3. Switch MCK0 to MAINCK.
  4. Set MDIV to 1 for MCK0.
  5. Start up CPUPLL.
  6. Switch MCK0 to CPUPLL with MDIV set to 3.
  7. Start up SYSPLL (400 MHz).
  8. Switch MCK1 to SYSPLL with MDIV set to 2.
  9. Switch MCK4 to SYSPLL with MDIV set to 1.
  10. Start up DDRPLL (533 MHz).
  11. Re-initialize SDRAM and exit Self-refresh mode.
  12. Recover data from SDRAM.