8.4.6 Programmable IO Controller (PIOC)

The PIO controller memory map is split in two parts: the lower 4 Kbytes are never secure, while the upper part is always secure. Each IO line can be configured as secure or non-secure. Once configured as secure in the secure part registers, only the Secure world can reprogram the corresponding IO. It is not possible to reconfigure a secure IO by modifying the non-secure part registers as long as this IO is set as secure.

Interrupts related to events on secure IOs are transmitted on secure lines (ID_PIO*_SINT). Non-secure IO events are transmitted on non-secure interrupt lines (ID_PIO*). The GIC must be configured in order to associate the secure interrupt lines to the secure interrupts group.

Table 8-11. PIO Controller Security Settings
Peripheral ID Type Security
ID_PIOA User interface interrupt ID

Secure except the first 4 Kbytes (Non-secure).

The interrupt targets Non-secure world (1).
ID_PIOB Interrupt ID only Non-secure
ID_PIOC Interrupt ID only Non-secure
ID_PIOD Interrupt ID only Non-secure
ID_PIOE Interrupt ID only Non-secure
ID_PIOA_SINT Interrupt ID only Secure
ID_PIOB_SINT Interrupt ID only Secure
ID_PIOC_SINT Interrupt ID only Secure
ID_PIOD_SINT Interrupt ID only Secure
ID_PIOE_SINT Interrupt ID only Secure
Note: The ID_PIOA security bit value is 'secure', whereas the corresponding interrupt ID_PIOA is dedicated to the Non-secure world. ID_PIOA must be secure so that the PIO memory map is secure above 4 Kbytes (a mechanism implemented in HBridge). The security bit value of peripheral IDs can conflict with the security level of interrupt IDs. In such case, the peripheral security level always prevails.

Refer to the section Parallel Input/Output Controller (PIO) for more details.