8.4.10 Extended DMA Controller (XDMAC)

Security of DMA channels is configurable channel-by-channel using bit PROT in the XDMAC_CC register. This bit can be configured in the Secure world only. A channel is non-secure by default.

Interrupts related to secure DMA channels are routed on a secure interrupt line.

Peripheral ID Type Security
ID_XDMAC0 User interface interrupt Programmable Secure
ID_XDMAC0_SINT Interrupt only (Secure channel) Secure
ID_XDMAC1 User interface interrupt Programmable Secure
ID_XDMAC1_SINT Interrupt only (Secure channel) Secure
ID_XDMAC2 User interface interrupt Programmable Secure
ID_XDMAC2_SINT Interrupt only (Secure channel) Secure

Refer to the section DMA Controller (XDMAC) for more details.