49.7.3 PDMC Configuration Register
This register can only be written if the WPEN bit is cleared in PDMC_WPMR.
| Name: | PDMC_CFGR |
| Offset: | 0x08 |
| Reset: | 0x00500044 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| PDMSEL3 | PDMSEL2 | PDMSEL1 | PDMSEL0 | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 1 | 1 | 0 | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| BSSEL3 | BSSEL2 | BSSEL1 | BSSEL0 | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 1 | 0 | 1 | 0 |
Bits 16, 18, 20, 22 – PDMSELx PDM Microphone Source Selection
| Value | Name | Description |
|---|---|---|
| 0 | DS0 | PDMSELx corresponds to PMDC_DS0. |
| 1 | DS1 | PDMSELx corresponds to PMDC_DS1. |
Bits 0, 2, 4, 6 – BSSELx Bitstream Source Selection
| Value | Description |
|---|---|
| 0 | The selected PDMC_DSx source is sampled on the positive edge of PDMC_CLK. |
| 1 | The selected PDMC_DSx source is sampled on the negative edge of PDMC_CLK. |