49.7.9 PDMC Write Protection Mode Register
See Register Write Protection for the list of write-protected registers.
| Name: | PDMC_WPMR |
| Offset: | 0x2C |
| Reset: | 0 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| WPKEY[23:16] | |||||||||
| Access | W | W | W | W | W | W | W | W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| WPKEY[15:8] | |||||||||
| Access | W | W | W | W | W | W | W | W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| WPKEY[7:0] | |||||||||
| Access | W | W | W | W | W | W | W | W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| WPITEN | WPEN | ||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 |
Bits 31:8 – WPKEY[23:0] Write Protection Key
| Value | Name | Description |
|---|---|---|
| 0x50444D | PASSWD | Writing any other value in this field aborts the write operation of the WPEN and WPITEN bits. Always read at 0. |
Bit 1 – WPITEN Write Protection Enable for Interrupt Registers
| Value | Description |
|---|---|
| 0 | Disables the write protection on interrupt registers if WPKEY corresponds to 0x50444D (“PDM” in ASCII). |
| 1 | Enables the write protection on interrupt registers if WPKEY corresponds to 0x50444D (“PDM” in ASCII). |
Bit 0 – WPEN Write Protection Enable for Configuration Registers
| Value | Description |
|---|---|
| 0 | Disables write protection if WPKEY corresponds to 0x50444D (“PDM” in ASCII). |
| 1 | Enables write protection if WPKEY corresponds to 0x50444D (“PDM” in ASCII). |