7 Configuration Bits

In dsPIC33AK128MC106 family devices, the Configuration Words are implemented as volatile memory. This means that configuration data will get loaded to volatile memory (from the Flash Configuration Words) each time the device is powered-up. There are two types of regions, CFGA for general purpose and CFGB for security. Both regions have a backup copy. The configuration data are automatically loaded from the Flash Configuration Words to the proper Configuration Shadow registers during device Resets. The locations of the CFGA and CFGB registers are shown in Table 7-2.

In the dsPIC33AK128MC106 family, the configuration and calibration data is duplicated in Flash for improved robustness. If a double ECC error is detected during the start-up sequence, the device will restart the loading of the calibration and configuration from the backup set in Flash. The backup addresses are offset 0x800 from their counterpart. When programming the Configuration bits, both the regular and backup sets should be programmed identically. Within the MPLAB IDE, only the regular set are configured. The backup set's duplication and programming is handled by the tool set.

To maintain the integrity of the stored configuration values, logic performs ongoing bit value checks. All device Configuration bits are implemented as a complementary set of register bits.

Table 7-1. Configuration Regions
RegionConfiguration Regions
CFGA0x7F3000 - 0x7F3800
CFGB0x7F4000 - 0x7F4800
Table 7-2. dsPIC33AK128MC106 Configuration Addresses
Register NameAddressRegister NameAddress
FCP0x7F3000FPR4ST0x7F4044
FICD0x7F3010FPR4END0x7F4048
FDEVOPT0x7F3020FPR5CTRL0x7F4050
FWDT0x7F3030FPR5ST0x7F4054
FPR0CTRL0x7F4000FPR5END0x7F4058
FPR0ST0x7F4004FPR6CTRL0x7F4060
FPR0END0x7F4008FPR6ST0x7F4064
FPR1CTRL0x7F4010FPR6END0x7F4068
FPR1ST0x7F4014FPR7CTRL0x7F4070
FPR1END0x7F4018FPR7ST0x7F4074
FPR2CTRL0x7F4020FPR7END0x7F4078
FPR2ST0x7F4024FIRT0x7F4080
FPR2END0x7F4028FSECDBG0x7F4090
FPR3CTRL0x7F4030FPED0x7F40A0
FPR3ST0x7F4034FEPUCB0x7F40B0
FPR3END0x7F4038FWPUCB0x7F40C0
FPR4CTRL0x7F4040
Table 7-3. Device ID and Revision Addresses
RegisterAddress
DEVID0x7C2000
DEVREV0x7C0004
Table 7-4. Family Device Identifier
DeviceDevice ID ValueJTAG ID Value
dsPIC33AK32MC1020x9D000x09D00053
dsPIC33AK32MC1030x9D010x09D01053
dsPIC33AK32MC1050x9D020x09D02053
dsPIC33AK32MC106 0x9D030x09D03053
dsPIC33AK64MC1020x9D100x09D10053
dsPIC33AK64MC1030x9D110x09D11053
dsPIC33AK64MC1050x9D120x09D12053
dsPIC33AK64MC1060x9D130x09D13053
dsPIC33AK128MC1020x9D200x09D20053
dsPIC33AK128MC1030x9D210x09D21053
dsPIC33AK128MC1050x9D220x09D22053
dsPIC33AK128MC1060x9D230x09D23053
Note: The register summary covers CFGA and CFGB areas.