32 Device Power-Saving Modes

The dsPIC33AK128MC106 family devices provide the ability to manage power consumption by selectively managing clocking to the CPU and the peripherals. In general, a lower clock frequency and a reduction in the number of peripherals being clocked constitutes lower consumed power.

This section describes the power-saving modes implemented in dsPIC33AK128MC106 devices. The dsPIC33AK128MC106 device family offers a number of built-in capabilities that allow user applications to select the best balance of performance and low-power consumption.

The power-saving features are:

Instruction-Based Power-Saving Modes
Peripheral Module Disable (PMD)

Combinations of these methods can be used to selectively tailor an application’s power consumption while still maintaining critical application features, such as timing-sensitive communications.