16.6.8 APBB Mask

Name: APBBMASK
Offset: 0x18
Reset: 0x00018056
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
        RAMECC 
Access R/W 
Reset 1 
Bit 15141312111098 
  TC3TC2TCC1TCC0SERCOM3SERCOM2  
Access R/WR/WR/WR/WR/WR/W 
Reset 000000 
Bit 76543210 
 EVSYS  PORT NVMCTRLDSUUSB 
Access R/WR/WR/WR/WR/W 
Reset 01110 

Bit 16 – RAMECC RAMECC APBB Clock Enable

ValueDescription
0 The APBB clock for the RAMECC is stopped.
1 The APBB clock for the RAMECC is enabled.

Bits 13, 14 – TCn TCn APBB Clock Enable

ValueDescription
0 The APBB clock for the TCn is stopped.
1 The APBB clock for the TCn is enabled.

Bits 11, 12 – TCCn TCCn APBB Clock Enable

ValueDescription
0 The APBB clock for the TCCn is stopped.
1 The APBB clock for the TCCn is enabled.

Bits 9, 10 – SERCOMn SERCOMn APBB Clock Enable

ValueDescription
0 The APBB clock for the SERCOMn is stopped.
1 The APBB clock for the SERCOMn is enabled.

Bit 7 – EVSYS EVSYS APBB Clock Enable

ValueDescription
0 The APBB clock for the EVSYS is stopped.
1 The APBB clock for the EVSYS is enabled.

Bit 4 – PORT PORT APBB Clock Enable

ValueDescription
0 The APBB clock for the PORT is stopped.
1 The APBB clock for the PORT is enabled.

Bit 2 – NVMCTRL NVMCTRL APBB Clock Enable

ValueDescription
0 The APBB clock for the NVMCTRL is stopped.
1 The APBB clock for the NVMCTRL is enabled.

Bit 1 – DSU DSU APBB Clock Enable

ValueDescription
0 The APBB clock for the DSU is stopped.
1 The APBB clock for the DSU is enabled.

Bit 0 – USB USB APBB Clock Enable

ValueDescription
0 The APBB clock for the USB is stopped.
1 The APBB clock for the USB is enabled.