4.4.2.1 LNA and Mixer

Two separate LNAs are integrated in the ATA8210/15, one for Low-band ranging from 310-477 MHz connected to the 1/RFIN_LB pin and one for High-band ranging from 836-956 MHz connected to the 2/RFIN_HB pin. The following table shows the setting of the RF front-end registers used for the different RF bands.

Table 4-4. Used Bias for the LNAs
Frequency Band [MHz]	FECR.LBNHB	FECR.S4N3	Used LNA Bias Out of Factory-locked EEPROM
310.00-318.00	`1`	`0`	FELNA_2.LBL_315[3:0]
418.00-477.00	`1`	`1`	FELNA_1.LBL_433[3:0]
836.00-956.00	`0`	`0`	FELNA_2.LBH[3:0]

The combined LNA and mixer gain for the Low-Band and the High-Band are calibrated using the FELNA.LBL[3:0] and FELNA.LBH[3:0] RF front-end registers, respectively. The calibration data are located in the factory-locked EEPROM. They compensate for the process tolerances in the gain of the LNAs and the mixer. The values must be written to the RF front-end registers before powering up the receive path.

An RF detector is included at the output of each LNA to detect an overload of the receiver. This detector has a fixed detector level of P_Gainswitch. For more details, refer to the ATA8210/ATA8215 UHF ASK/FSK Receiver Data Sheet (9344E), section 4, parameter 8.60. After powering up the receive path, the status of the corresponding detector can be read either at the FESR.LBSAT or at the FESR.HBSAT register bit. The status of these bits can be read during power-up of the receive path to activate the damping D_Switch, included into the SPDT, if the level exceeds P_GainSwitch. For more details, refer to the ATA8210/ATA8215 UHF ASK/FSK Receiver Data Sheet (9344E), section 4, parameter 8.80. As a result, the blocking measured on the RFIN inputs pin 1 and pin 2 is different from that measured on pin 4 for large blockers with a level exceeding P_Gainswitch.