45.5 Comparator Interrupt

An interrupt can be generated for every rising or falling edge of the comparator output.

When either edge detector is triggered and its associated enable bit is set (INTP and/or INTN bits), the Corresponding Interrupt Flag bit (CxIF bit of the respective PIR register) will be set.

To enable the interrupt, the following bits must be set:

  • EN bit
  • INTP bit (for a rising edge detection)
  • INTN bit (for a falling edge detection)
  • CxIE bit of the respective PIE register
  • GIE bit of the INTCON0 register

The associated interrupt flag bit, CxIF bit of the respective PIR register, must be cleared in software to successfully detect another edge.

Important: Although a comparator is disabled, an interrupt will be generated by changing the output polarity with the POL bit.