25.13.4 TxGATE

Timer Gate Source Selection Register
Name: TxGATE
Offset: 0x320,0x32C,0x338

Bit 76543210 
   GSS[5:0] 
Access R/WR/WR/WR/WR/WR/W 
Reset 000000 

Bits 5:0 – GSS[5:0] Timer Gate Source Selection

Table 25-5. Timer Gate Sources
GSSGate Source
Timer1Timer3Timer5
111111-100010Reserved
100001CLC8_OUT
100000CLC7_OUT
011111CLC6_OUT
011110CLC5_OUT
011101CLC4_OUT
011100CLC3_OUT
011011CLC2_OUT
011010CLC1_OUT
011001ZCD_OUT
011000CMP2_OUT
010111CMP1_OUT
010110NCO3_OUT
010101NCO2_OUT
010100NCO1_OUT
010011PWM4S1P2_OUT
010010PWM4S1P1_OUT
010001PWM3S1P2_OUT
010000PWM3S1P1_OUT
001111PWM2S1P2_OUT
001110PWM2S1P1_OUT
001101PWM1S1P2_OUT
001100PWM1S1P1_OUT
001011CCP3_OUT
001010CCP2_OUT
001001CCP1_OUT
001000SMT1_OUT
000111TMR6_Postscaler_OUT
000110TMR5_OUTTMR5_OUTReserved
000101TMR4_Postscaler_OUT
000100TMR3_OUTReservedTMR3_OUT
000011TMR2_Postscaler_OUT
000010ReservedTMR1_OUTTMR1_OUT
000001TMR0_OUT
000000Pin selected by T1GPPSPin selected by T3GPPSPin selected by T5GPPS