20.12.1 Control

Name: CTRL
Offset: 0x0000
Reset: 0x00
Property: PAC Write-Protection

Bit 76543210 
 ReservedReserved CEMBISTCRC SWRST 
Access --WWWW 
Reset 000000 

Bit 7 – Reserved

Must be set to 0.

Bit 6 – Reserved

Must be set to 0.

Bit 4 – CE Chip-Erase

Writing a '0' to this bit has no effect.

Writing a '1' to this bit starts the Chip-Erase operation.

Note: The chip erase operation can only be performed if the Chip Erase Hard Lock has not been set (STATUS2:CEHL=0). Once STATUS2:CEHL=1, the chip erase feature becomes permanently disabled.

Bit 3 – MBIST Memory Built-In Self-Test

Writing a '0' to this bit has no effect.

Writing a '1' to this bit starts the memory BIST algorithm.

Bit 2 – CRC 32-bit Cyclic Redundancy Check

Writing a '0' to this bit has no effect.

Writing a '1' to this bit starts the cyclic redundancy check algorithm.

Bit 0 – SWRST Software Reset

Writing a '0' to this bit has no effect.

Writing a '1' to this bit resets the module.