17.3.1 Alternate Functions of Port B

The Port B pins with alternate functions are shown in the table below:

The alternate pin configuration is as follows:

• XTAL2/TOSC2/PCINT7 – Port B, Bit 7
  • XTAL2: Chip clock Oscillator pin 2. Used as clock pin for crystal Oscillator or Low-frequency crystal Oscillator. When used as a clock pin, the pin can not be used as an I/O pin.
  • TOSC2: Timer Oscillator pin 2. Used only if internal calibrated RC Oscillator is selected as chip clock source, and the asynchronous timer is enabled by the correct setting in ASSR. When the AS2 bit in ASSR is set (one) and the EXCLK bit is cleared (zero) to enable asynchronous clocking of Timer/Counter2 using the Crystal Oscillator, pin PB7 is disconnected from the port, and becomes the inverting output of the Oscillator amplifier. In this mode, a crystal Oscillator is connected to this pin, and the pin cannot be used as an I/O pin.
  • PCINT7: Pin Change Interrupt source 7. The PB7 pin can serve as an external interrupt source.

If PB7 is used as a clock pin, DDB7, PORTB7, and PINB7 will all read 0.

• XTAL1/TOSC1/PCINT6 – Port B, Bit 6
  • XTAL1: Chip clock Oscillator pin 1. Used for all chip clock sources except internal calibrated RC Oscillator. When used as a clock pin, the pin can not be used as an I/O pin.
  • TOSC1: Timer Oscillator pin 1. Used only if internal calibrated RC Oscillator is selected as chip clock source, and the asynchronous timer is enabled by the correct setting in ASSR. When the AS2 bit in ASSR is set (one) to enable asynchronous clocking of Timer/Counter2, pin PB6 is disconnected from the port and becomes the input of the inverting Oscillator amplifier. In this mode, a crystal Oscillator is connected to this pin, and the pin cannot be used as an I/O pin.
  • PCINT6: Pin Change Interrupt source 6. The PB6 pin can serve as an external interrupt source.

If PB6 is used as a clock pin, DDB6, PORTB6, and PINB6 will all read 0.

• SCK0/XCK0/PCINT5 – Port B, Bit 5
  • SCK0: Master00 Clock output, Slave Clock input pin for SPI0 channel. When the SPI0 is enabled as a Slave, this pin is configured as an input regardless of the setting of DDB5. When the SPI0 is enabled as a Master, the data direction of this pin is controlled by DDB5. When the pin is forced by the SPI0 to be an input, the pull-up can still be controlled by the PORTB5 bit.
  • XCK0: USART0 External clock. The Data Direction Register (DDB5) controls whether the clock is output (DDB5 set “1”) or input (DDB5 cleared). The XCK0 pin is active only when the USART0 operates in Synchronous mode.
  • PCINT5: Pin Change Interrupt source 5. The PB5 pin can serve as an external interrupt source.

• MISO0/RXD1/PCINT4 – Port B, Bit 4
  • MISO0: Master0 Data input, Slave Data output pin for SPI0 channel. When the SPI0 is enabled as a Master, this pin is configured as an input regardless of the setting of DDB4. When the SPI0 is enabled as a Slave, the data direction of this pin is controlled by DDB4. When the pin is forced by the SPI0 to be an input, the pull-up can still be controlled by the PORTB4 bit.
  • RXD1: Receive Data (Data input pin for the USART1). When the USART1 Receiver is enabled this pin is configured as an input regardless of the value of DDB4. When the USART forces this pin to be an input, the pull-up can still be controlled by the PORTB4 bit.
  • PCINT4: Pin Change Interrupt source 4. The PB4 pin can serve as an external interrupt source.

• MOSI0/TXD1/OC2A/PCINT3 – Port B, Bit 3
  • MOSI0: SPI0 Master Data output, Slave Data input for SPI0 channel. When the SPI0 is enabled as a Slave, this pin is configured as an input regardless of the setting of DDB3. When the SPI0 is enabled as a Master, the data direction of this pin is controlled by DDB3. When the pin is forced by the SPI0 to be an input, the pull-up can still be controlled by the PORTB3 bit.
  • TXD1: Transmit Data (Data output pin for the USART1). When the USART1 Transmitter is enabled, this pin is configured as an output regardless of the value of DDB3.
  • OC2A: Output Compare Match output. The PB3 pin can serve as an external output for the Timer/Counter2 Compare Match A. The PB3 pin has to be configured as an output (DDB3 set '1') to serve this function. The OC2A pin is also the output pin for the PWM mode timer function.
  • PCINT3: Pin Change Interrupt source 3. The PB3 pin can serve as an external interrupt source.

• SS0/OC1B/PCINT2 – Port B, Bit 2
  • SS0: Slave0 Select input. When the SPI0 is enabled as a Slave, this pin is configured as an input regardless of the setting of DDB2. As a Slave, the SPI0 is activated when this pin is driven low. When the SPI0 is enabled as a Master, the data direction of this pin is controlled by DDB2. When the pin is forced by the SPI0 to be an input, the pull-up can still be controlled by the PORTB2 bit.
  • OC1B: Output Compare Match output. The PB2 pin can serve as an external output for the Timer/Counter1 Compare Match B. The PB2 pin has to be configured as an output (DDB2 set (one)) to serve this function. The OC1B pin is also the output pin for the PWM mode timer function.
  • PCINT2: Pin Change Interrupt source 2. The PB2 pin can serve as an external interrupt source.

• OC1A/PCINT1 – Port B, Bit 1
  • OC1A: Output Compare Match output. The PB1 pin can serve as an external output for the Timer/Counter1 Compare Match A. The PB1 pin has to be configured as an output (DDB1 set (one)) to serve this function. The OC1A pin is also the output pin for the PWM mode timer function.

  • PCINT1: Pin Change Interrupt source 1. The PB1 pin can serve as an external interrupt source.

• ICP1/CLKO/PCINT0 – Port B, Bit 0
  • ICP1: Input Capture Pin. The PB0 pin can act as an Input Capture Pin for Timer/Counter1.
  • CLKO: Divided System Clock. The divided system clock can be output on the PB0 pin. The divided system clock will be output if the CKOUT Fuse is programmed, regardless of the PORTB0 and DDB0 settings. It will also be output during reset.
  • PCINT0: Pin Change Interrupt source 0. The PB0 pin can serve as an external interrupt source.

Table 17-3 and Table 17-5 relate the alternate functions of Port B to the overriding signals shown in Figure 17-5. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute the MISO signal, while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE INPUT.

Notes: 1. INTRC means that one of the internal RC Oscillators are selected (by the CKSEL fuses), EXTCK means that external clock is selected (by the CKSEL fuses).