2.4.1 Dual-Port Large SRAM

Large SRAM (LSRAM) (RAM1K×18) is targeted for storing large memory for use with various operations. Each LSRAM block can store up to 18,432 bits. Each RAM1K×18 block contains Port A and Port B. The LSRAM is synchronous for both read and write operations. Operations are triggered on the rising edge of the clock. The data output ports of the LSRAM have pipeline registers, which have control signals that are independent of the SRAM’s control signals.