2.7 High-Speed Serial Interfaces

This section discusses about high-speed serial interfaces.

Up to 16 SerDes lanes are available and each of them has the following characteristics:

  • XGMII Extended Sublayer (XGXS)/10 Gbps Attachment Unit Interface (XAUI) extension (to implement a 10 Gbps (10 Gigabit Media Independent Interface (XGMII)) Ethernet Embedded Physical Interface (PHY) interface)
  • Native EPCS SerDes interface facilitates implementation of serial rapid IO in fabric or an SGMII interface to a soft Ethernet MAC
  • PCIe endpoint controller
  • ×1, ×2, and ×4 lane PCI express core
  • Up to 2 kbps maximum payload size
  • 64/32-bit Advanced eXtensible Interface (AXI)/Advanced High-performance Bus (AHB) Host and Client interfaces to the application layer