2.4.3 Math Blocks for DSP Applications

The fundamental building block in any digital signal processing algorithm is the Multiply Accumulate (MACC) function. The IGLOO 2 device implements a custom 18 × 18 MACC block for efficient implementation of complex DSP algorithms such as Finite Impulse Response (FIR) filters, Infinite Impulse Response (IIR) filters, and Fast Fourier Transform (FFT) for filtering and image processing applications.

Each math block has the following capabilities:

• Supports18 × 18 signed multiplications natively (A[17:0] × B[17:0])
• Supports dot product; the multiplier computes:
  • (A[8:0]× B[17:9] + A[17:9] × B[8:0]) × 2⁹
• Built-in addition, subtraction, and accumulation units to combine multiplication results efficiently

In addition to the basic MACC function, DSP algorithms typically need small amounts of RAM for coefficients and larger RAMs for data storage. IGLOO 2 micro RAMs are ideally suited to serve the needs of coefficient storage while the large RAMs are used for data storage.