21.7 Control and Status Space Register Descriptions
The control and status registers of the Tiny Programming Interface are mapped in the Control and Status Space (CSS) of the interface. These registers are not part of the I/O register map and are accessible via SLDCS and SSTCS instructions, only. The control and status registers are directly involved in configuration and status monitoring of the TPI.
Offset | Name | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
---|---|---|---|---|---|---|---|---|---|
0x0F | TPIIR | Tiny Programming Interface Identification Code | |||||||
0x0E ... 0x03 | Reserved | - | - | - | - | - | - | - | - |
0x02 | TPIPCR | - | - | - | - | - | GT2 | GT1 | GT0 |
0x01 | Reserved | - | - | - | - | - | - | - | - |
0x00 | TPISR | - | - | - | - | - | - | NVMEN | - |