21.5 Instruction Set
The TPI has a compact instruction set that is used to access the TPI Control and Status Space (CSS) and the data space. The instructions allow the external programmer to access the TPI, the NVM Controller and the NVM memories. All instructions except SKEY require one byte operand following the instruction. The SKEY instruction is followed by 8 data bytes. All instructions are byte-sized.
| Mnemonic | Operand | Description | Operation |
|---|---|---|---|
| SLD | data, PR | Serial LoaD from data space using indirect addressing | data ← DS[PR] |
| SLD | data, PR+ | Serial LoaD from data space using indirect addressing and post-increment |
data ← DS[PR] PR ← PR+1 |
| SST | PR, data | Serial STore to data space using indirect addressing | DS[PR] ← data |
| SST | PR+, data | Serial STore to data space using indirect addressing and post-increment |
DS[PR] ← data PR ← PR+1 |
| SSTPR | PR, a | Serial STore to Pointer Register using direct addressing | PR[a] ← data |
| SIN | data, a | Serial IN from data space | data ← I/O[a] |
| SOUT | a, data | Serial OUT to data space | I/O[a] ← data |
| SLDCS | data, a | Serial LoaD from Control and Status space using direct addressing | data ← CSS[a] |
| SSTCS | a, data | Serial STore to Control and Status space using direct addressing | CSS[a] ← data |
| SKEY | Key, {8{data}} | Serial KEY | Key ← {8{data}} |