19.4.5 Bus Matrix Host Remap Control Register

This register can only be written if the WPEN bit is cleared in the Write Protection Mode Register.

Name: MATRIX_MRCR
Offset: 0x0100
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
    RCB12RCB11RCB10RCB9RCB8 
Access R/WR/WR/WR/WR/W 
Reset 00000 
Bit 76543210 
 RCB7RCB6RCB5RCB4RCB3RCB2RCB1RCB0 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12 – RCBx Remap Command Bit for Host x

ValueDescription
0

Disables remapped address decoding for the selected Host.

1

Enables remapped address decoding for the selected Host.