37.8.108 GMAC Screening Type 1 Register x Priority Queue

Screening type 1 registers are used to allocate up to priority queues to received frames based on certain IP or UDP fields of incoming frames.

Name: GMAC_ST1RPQx
Offset: 0x0500 + x*0x04 [x=0..1]
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
   UDPEDSTCEUDPM[15:12] 
Access R/WR/WR/WR/WR/WR/W 
Reset 000000 
Bit 2322212019181716 
 UDPM[11:4] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 UDPM[3:0]DSTCM[7:4] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 DSTCM[3:0] QNB[2:0] 
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 

Bit 29 – UDPE UDP Port Match Enable

When this bit is written to '1', the UDP Destination Port of the received UDP frame is matched against the value stored in the bit field UDPM.

Bit 28 – DSTCE Differentiated Services or Traffic Class Match Enable

When this bit is written to '1', the DS (differentiated services) field of the received IPv4 header or TC field (traffic class) of IPv6 headers are matched against the value stored in bit field DSTCM.

Bits 27:12 – UDPM[15:0] UDP Port Match

When UDP port match enable is set (UDPME=1), the UDP Destination Port of the received UDP frame is matched against this bit field.

Bits 11:4 – DSTCM[7:0] Differentiated Services or Traffic Class Match

When DS/TC match enable is set (DSTCE), the DS (differentiated services) field of the received IPv4 header or TC field (traffic class) of IPv6 headers are matched against this bit field.

Bits 2:0 – QNB[2:0]  Queue Number

If a match is successful, then the queue value programmed in this bit field is allocated to the frame.