6.4.1 Block Write-Protect Function
The
WRSR instruction allows the user to select one of four possible
combinations as to how the memory array will be inhibited from writing through changing
the Block Write-Protect bits (BP1, BP0). The four levels of array protection are:- None of the memory array is protected.
- Upper quarter (¼) address range is write-protected meaning the highest order address bits are read‑only.
- Upper half (½) address range is write-protected meaning the highest order address bits are read‑only.
- All of the memory array is write-protected meaning all address bits are read‑only.
The Block Write Protection levels and corresponding STATUS register control
bits are shown in Table 6-4.
| Level | STATUS Register Bits | Write-Protected/Read‑Only Address Range | |
|---|---|---|---|
| BP1 | BP0 | AT25512 | |
| 0 | 0 | 0 | None |
| 1(1/4) | 0 | 1 | C000h-FFFFh |
| 2(1/2) | 1 | 0 | 8000h-FFFFh |
| 3(All) | 1 | 1 | 0000h-FFFFh |