37 Instruction Set Summary

PIC16(L)F18425/45 devices incorporate the standard set of 50 PIC16 core instructions. Each instruction is a 14-bit word containing the operation code (opcode) and all required operands. The opcodes are broken into three broad categories:
  • Byte-Oriented
  • Bit-Oriented
  • Literal and Control

The literal and control category contains the most varied instruction word format.

The Instruction Set table lists the instructions recognized by the MPASM™ assembler.

All instructions are executed within a single instruction cycle, with the following exceptions, which may take two or three cycles:
  • Subroutine entry takes two cycles (CALL, CALLW)
  • Returns from interrupts or subroutines take two cycles (RETURN, RETLW, RETFIE)
  • Program branching takes two cycles (GOTO, BRA, BRW, BTFSS, BTFSC, DECFSZ, INCSFZ)
  • One additional instruction cycle will be used when any instruction references an indirect file register and the file select register is pointing to program memory.

One instruction cycle consists of four oscillator cycles; for an oscillator frequency of 4 MHz, this gives a nominal instruction execution rate of 1 MHz.

All instruction examples use the format ‘0xhh’ to represent a hexadecimal number, where ‘h’ signifies a hexadecimal digit.