30.3.13.5 System Effects on Fault Injection
Entry to Debug Mode or an Interrupt Service Routine can cause discrepancy between what the Fault Logic sees and what the CPU/system sees. This does not cause an erroneous condition for the system. However, the Fault Logic can show an event when it is not manifested in the system.
Because entry to these states are event driven and not part of the program flow the CPU can abort an instruction (or data) fetch in order to service the interruption. Fault code is susceptible to this condition if it happens to perform a read of Flash at this juncture.
Interrupts
When FFLTCTRL.FLTMD selects one of the Fault Injection modes, fault logic does NOT set INTFLAG.FLTCAP. User code is expected to know it is accessing the Flash at FFLTADR causing a fault to be injected. However, if the access is a read, user code can expect to experience a system error/interrupt associated with the fault (that is, either an SEC interrupt or a bus error related to DED). Note that faults detected in Bypass Mode do not cause system error/interrupts.
When FLTMD selects a Capture mode, fault logic sets INTFLAG.FLTCAP = 1 when it detects a CTL, SEC, or DED fault (captured and reported respectively by the FFLTSYN bits CERR, SERR, or DERR) from the Flash read data path. Note that CTL faults detected in ECC Mode (ECCCTRL.ECCCTL[1:0]=2’b00) do not set INTFLAG.FLTCAP.
When INTFLAG.FLTCAP = 1, the Fault Logic halts operation allowing user code to service the interrupt. When INTFLAG.FLTCAP = 0, the Fault Logic resumes/continues operation.
Effects on DBGCTRL on FLT
ECC and Fault capture are not controlled by DBGCTRL.CRCRUN. When the CPU is halted in debug mode the Flash ECC and Fault capture works as defined by DBGECC field in DBGCTRL.