30.2.5 Erase and Word Write Flow

The address for erases and the address/data for word writes is stored by the CPU in the Special Function Registers (SFRs) of the FCW. The CPU stores this data using Peripheral Bus A. Flash operations are executing using the FCR (Flash Controller, Read). This is shown in the following figure.

Figure 30-4. Erase and Word Write Flow System Diagram