30.2.13 FCW Sequencer User Model

KEY.KEY must be written with the WRKEY value before CTRLA can be written to start a Write/Erase sequence. Once CTRLA is written, the KEY register returns to 0’s (locks) and all registers in the FCW are write protected (STATUS.BUSY=1) until the operation finishes. Write protecting the registers prevents addresses, data and configuration changing in mid sequence.

Once the NVM system is configured the only registers necessary for programming are CTRLA, KEY, ADDR, and either DATAx or SRCADDR. Page Erase does not need DATAx or SRCADDR. Other Erases do not need ADDR.

For Write/Erase, the steps are as follows:

1. Lock the hardware write mutex by setting the LOCK bit to ‘1’ and the OWNER field to ‘01’ simultaneously to the MUTEX register. Ensure that these bits are set correctly before proceeding, if the OWNER field is not ‘01’ and the LOCK bit is ‘1’ another system has ownership of the hardware write mutex and this operation must be attempted again when that system releases the mutex.
2. Setup ADDR and if programming either DATAx (Single/Quad) or SRCADDR (Row Write).
3. Write WRKEY to KEY.KEY.
4. Write CTRLA.NVMOP to <Desired NVMOP>.
5. The FCW generates an interrupt when it clears STATUS.BUSY and sets INTFLAG.DONE.

When CTRLA is written, the write/erase sequence starts and the CPU is unable to execute from the selected Flash panel for the duration of the sequence.