4.1 Revision History


Doc. Rev.	Date	Comments
F	04/2025	Document: General editorial updates Back Matter and PDF front cover updates Added Erratum for silicon Rev. A4, Rev. A5 and Rev. B0: ADC: ADC MUX Selection and Accumulation Number has Delayed Update When Initialization Delay is Used TCB: TCB4 Waveform Output Alternative 1 Non-Functional Added Data Sheet Clarifications: Device: FUSE - Configuration and User Fuses CLKCTRL - Clock Controller: Interrupts RSTCTRL - Reset Controller: Domains Affected By Reset SLPCTRL - Sleep Controller: Sleep Modes SPI - Serial Peripheral Interface: Client Mode SPI - Serial Peripheral Interface: Buffer Mode UPDI - Unified Program and Debug Interface: UPDI - Reset Controller Electrical Characteristics: USART Electrical Characteristics: AC Electrical Characteristics: ADC Electrical Characteristics: DAC Characteristics Graphs: BOD
E	04/2024	Document: General editorial updates Added Errata for silicon Rev. B0: Device: Write Operation Lost if Consecutive Writes to Specific Address Spaces NVMCTRL: NVM_EEPROM_ERASE Command does Not Respect Write Protect PORT: PD0 Input Buffer is Floating TCD: Halting TCD and Waiting for SW Restart Does Not Work if Compare Value A is `0` or Dual Slope Mode is Used TWI: Flush Non-Functional USART: Receiver Non-Functional after Detection of Inconsistent Synchronization Field Added Data Sheet Clarifications: SPI: Client Mode SPI: Buffer Mode Electrical Characteristics: I/O Pins Electrical Characteristics: SPI
D	12/2022	Added Errata: SPI: Alternative 2 Pin Position is Non-Functional for SPI1 with 48-Pin Devices USART: Receiver Non-Functional after Detection of Inconsistent Synchronization Field Document: General editorial updates Removed all data sheet clarifications as they are fixed in the device data sheet revision B
C	03/2022	Document: General editorial updates. Added errata: Device: CRC Check During Reset Initialization Is not Functional CLKCTRL: PLL Status not Working as Expected DAC: DAC Output Buffer Lifetime Drift NVMCTRL: Flash Multi-Page Erase Can Erase Write Protected Section TCA: Restart Will Reset Counter Direction in NORMAL and FRQ Mode TCD: Halting TCD and Waiting for SW Restart Does Not Work if Compare Value A is `0` or Dual Slope Mode is Used TWI: Flush Non-Functional Updated errata: USART: Start-of-Frame Detection Can Unintentionally Be Triggered in Active Mode Added data sheet clarifications: Features FUSE - Configuration and User Fuses - SYSCFG0 Peripherals and Architecture - REVID Voltage Regulator Control (VREGCTRL) Single-Shot Mode Analog Comparator Interrupt Control DAC Output Electrical Characteristics - Memory Programming Specifications
B	10/2020	Added errata: Device: Increased Current Consumption May Occur When VDD Drops CLKCTRL: The PLL Will Not Run When Using XOSCHF With an External Crystal TCB: CCMP and CNT Registers Operate as 16-Bit Registers in 8-Bit PWM Mode TCD: Asynchronous Input Events Not Working When TCD Counter Prescaler is Used CMPAEN Controls All WOx For Alternative Pin Functions Updated errata: CCL: The CCL Must be Disabled to Change the Configuration of a Single LUT The LINK Input Source Selection for LUT3 is Not Functional on 28- and 32- pin Devices ZCD: All ZCD Output Selection Bits are Tied to the ZCD0 Bit Added data sheet clarification: Added Typical Characteristics section with additional plots for OPAMP peripheral.
A	08/2020	Initial document release