6 Reset Structure
(Ask a Question)The DEVICE_INIT_DONE and external reset ARST_N signal is mapped to K22 on the evaluation board and initiates the reset signal (FABRIC_RESET_N) from the res_syn_0 block. This provides a reset to the CoreJESD204BRX (RESET_N of CoreJESD204BRX), UART block, DATA_GENERATOR, ERR_GEN, CoreJESD204BTX, LED_DEBUG, and PF_XCVR (LANE0_PMA_ARST_N) modules of the design. The RX_RESET_N output from the COREJESD204BRX provides a reset to the LANE0_PCS_ARST_N inputs of the PF_XCVR_0, PRBS_CHECKER, and LED_DEBUG modules. The PF_INIT_MONITOR provides a reset to the CTRL_ARST_N input of the PF_XCVR_0 module. The following figure shows the reset structure.
