SAMA5D29

37.9.1 Data Bus Width

A data bus width of 8 or 16 bits can be selected for each chip select. This option is controlled by the bit DBW in the Mode register (HSMC_MODE) for the corresponding chip select.

Figure 37-4 shows how to connect a 512 KB x 8-bit memory on NCS, Figure 37-5 shows how to connect a 512 KB x 16-bit memory on NCS.

Figure 37-4. Memory Connection for an 8-bit Data Bus

Note: NCS represents one of the NCS[0:3] chip select lines. Ax represents A[25].

Figure 37-5. Memory Connection for a 16-bit Data Bus

Note: NCS represents one of the NCS[0:3] chip select lines. Ax represents A[25].

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