39.15 SPI - Timing Characteristics

Figure 39-5. SPI - Timing Requirements in Host Mode
Table 39-20. SPI - Timing Specifications in Host Mode
SymbolDescriptionMin.Typ.✝Max.UnitCondition
fSCK *SCK clock frequencyfCLK_PER/2MHz
TSCK *SCK period2 × TCLK_PERns
tSCKWSCK high/low width0.5 × TSCKns
tMISMISO setup to SCKTCLK_PERns
tMIHMISO hold after SCK0ns
tMOSMOSI setup to SCK0.5 × TSCKns
tMOHMOSI hold after SCK0.5 × TSCKns

Unless otherwise specified, data in the “Typ.” column is at TA = 25°C and VDD = 3.0V. These parameters are not tested and are for design guidance only.

* These parameters are characterized but not tested in production.

Figure 39-6. SPI - Timing Requirements in Client Mode
Table 39-21. SPI - Timing Specifications in Client Mode
SymbolDescriptionMin.Typ.✝Max.UnitCondition
fSSCK *Client SCK clock frequencyfCLK_PER/6MHz
TSSCK *Client SCK period6 × TCLK_PERns
tSSCKW *SCK high/low width3 × TCLK_PERns
tSIS *MOSI setup to SCK0ns
tSIH *MOSI hold after SCK3 × TCLK_PERns
tSSS *SS setup to SCKTCLK_PERns
tSSH *SS hold after SCKTCLK_PERns
tSDLYInterbyte delay

5 - fCLK_PER/(2 × fSCK)

nsfSSCK < fCLK_PER/10
0fSSCK ≥ fCLK_PER/10
tSOSMISO valid after SCKtSRns
tSOSSMISO setup after SS lowtSRns
tSOSHMISO hold after SS lowtSRns

Unless otherwise specified, data in the “Typ.” column is at TA = 25°C and VDD = 3.0V. These parameters are not tested and are for design guidance only.

* These parameters are characterized but not tested in production.