6.5.2 SSC XDMAC Channel Initialization

A DMA channel from the XDMAC module is configured to transfer the audio data from an array in main memory to the Transmit Holding Register (THR) of the SSC. The code snippet given below configures the XDMAC channel 0 in a single block – Single Micro Block mode with a micro block length equal to the total number of audio samples * 2 (for 2 channels).

Data transfer is done one channel sample (16-bit) at a time.

/* Enable peripheral clock for XDMAC0 */
PMC->PMC_PCER0 = (1u << ID_XDMAC0);

/* Read the interrupt status register to clear the interrupt flags */
temp = XDMAC0->XDMAC_CHID[0].XDMAC_CIS;

/* Set source address as starting address of audio buffer */
XDMAC0->XDMAC_CHID[0].XDMAC_CSA = (uint32_t)audio_samples;

/* Set destination address as SSC_THR register’s 16 MSB bits */
XDMAC0->XDMAC_CHID[0].XDMAC_CDA = ((uint32_t)&SSC1->SSC_THR) + 2;

/* Set micro block length */
XDMAC0->XDMAC_CHID[0].XDMAC_CUBC = sizeof(audio_samples)/2;

/* Set DMA channel parameters */
XDMAC0->XDMAC_CHID[0].XDMAC_CC = XDMAC_CC_TYPE_PER_TRAN
                                     | XDMAC_CC_MBSIZE_SINGLE 
                                     | XDMAC_CC_DSYNC_MEM2PER
                                     | XDMAC_CC_CSIZE_CHK_1
                                     | XDMAC_CC_DWIDTH_HALFWORD
                                     | XDMAC_CC_SIF_AHB_IF0
                                     | XDMAC_CC_DIF_AHB_IF1
                                     | XDMAC_CC_SAM_INCREMENTED_AM 
                                     | XDMAC_CC_DAM_FIXED_AM
                                     | XDMAC_CC_PERID(23);

/* Set all registers related to descriptor to 0 */
XDMAC0->XDMAC_CHID[0].XDMAC_CNDC = 0;
XDMAC0->XDMAC_CHID[0].XDMAC_CBC = 0;
XDMAC0->XDMAC_CHID[0].XDMAC_CDS_MSP = 0;
XDMAC0->XDMAC_CHID[0].XDMAC_CSUS = 0;
XDMAC0->XDMAC_CHID[0].XDMAC_CDUS = 0;

The DMA channel source address is set to the start of the audio sample array, and the destination address is set to the start of the 16 MSB of the THR register. This is because we need to send the 16-bit audio sample first in the MSB part of the SSC 32-bit word. "audio_samples" is an array of type signed 16-bit integer. The transfer size is set to half-word, with the source address incrementing and the destination address fixed for each transfer.

No descriptors are used for the transfer, so the XDMAC registers related to the descriptor configuration are set to zero.