6.5.3 SSC Initialization

The following code snippet initializes the SSC interface.

/* Enable peripheral clock for SSC1 */
PMC->PMC_PCR = PMC_PCR_PID(ID_SSC1) | PMC_PCR_CMD | PMC_PCR_EN;

/* Perform software reset of SSC1 peripheral */
SSC1->SSC_CR = SSC_CR_SWRST;

/* Configure SSC1 parameters */
SSC1->SSC_TCMR = SSC_TCMR_CKS_TK 
                    | SSC_TCMR_STTDLY(1)
                    | SSC_TCMR_START_TF_FALLING;

SSC1->SSC_TFMR = SSC_TFMR_DATLEN(31) 
                    | SSC_TFMR_MSBF
                    | SSC_TFMR_DATNB(1);

/* Enable SSC1 transmitter */
SSC1->SSC_CR = SSC_CR_TXEN;

/* Enable DMA channel */
XDMAC0->XDMAC_GE = XDMAC_GE_EN0;

/* Wait until DMA transfer is done */
while(!(XDMAC0->XDMAC_CHID[0].XDMAC_CIS & XDMAC_CIS_BIS));

SSC1 is used for this example. The TK and TF pins are configured as inputs, which accept the bit clock and the LR clock, respectively, from the AD1934 module. Data are sent as a 32-bit word with the original 16-bit audio data placed in the 16 MSB bits and the 16 LSB bits left at 0.

The SSC is configured to have a frame of two words and to start a frame on the falling edge of the TF pin, but one bit clock delayed (STTDLY = 1) to comply with the I2S frame format.