14.4.4.3 Interrupt Handling

Access conflicts may occur when reading and writing data simultaneously at the two independent ports of the Frame Buffer, TX/RX BBP and SPI. These ports have their own address counter that points to the Frame Buffer’s current address.

Access violations may cause data corruption and are indicated by IRQ_6 (TRX_UR) interrupt when using the Frame Buffer access mode. Note that access violations are not indicated when using the SRAM access mode.

While receiving a frame, first the data need to be stored in the Frame Buffer before reading it. This can be ensured by accessing the Frame Buffer at least eight symbols (BPSK) or two symbols (O-QPSK) after interrupt IRQ_2 (RX_START). When reading the frame data continuously, the SPI data rate shall be lower than the current TRX bit rate to ensure no underrun interrupt occurs. To avoid access conflicts and to simplify the Frame Buffer read access, Frame Buffer Empty indication may be used.

When writing data to the Frame Buffer during frame transmission, the SPI data rate shall be higher than the PHY data rate avoiding underrun. The first byte of the PSDU data must be available in the Frame Buffer before SFD transmission is complete, which takes 41 symbol periods for BPSK (one symbol PA ramp up + 40 symbols SHR) and 11 symbol periods for O-QPSK (one symbol PA ramp up + 10 symbols SHR) from the rising edge of pin 11 (SLP_TR) (see Figure 14-20).

Note:
  1. Interrupt IRQ_6 (TRX_UR) is valid two octets after IRQ_2 (RX_START).
  2. If a Frame Buffer read access is not finished until a new frame is received, an IRQ_6 (TRX_UR) interrupt occurs. Nevertheless the old frame data can be read, if the SPI data rate is higher than the effective PHY data rate. A minimum SPI clock rate of 1MHz is recommended in this case. Finally, the microcontroller should check the integrity of the transferred frame data by calculating the FCS.
  3. When writing data to the Frame Buffer during frame transmission, the SPI data rate shall be higher than the PHY data rate to ensure no under run interrupt. The first byte of the PSDU data must be available in the Frame Buffer before SFD transmission is complete.