12.1.4.4.7 SDMMC Memory Configuration Data (Second Word)

Warning: To avoid any malfunctioning, the user must not write the "DO NOT USE (DNU)" bits.
Name: MEM_CFGx[1]

Bit 3130292827262524 
 DNUDNUDNUDNUDNUDNUDNUDNU 
Access  
Reset  
Bit 2322212019181716 
 DNUDNUDNUDNUDNUDNUDNUDNU 
Access  
Reset  
Bit 15141312111098 
 WPKEY[7:0] 
Access  
Reset  
Bit 76543210 
 ENABLEPID[1:0]PIN[4:0] 
Access  
Reset  

Bits 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 – DNU DO NOT USE

Bits 15:8 – WPKEY[7:0] Write Protect Key

ValueNameDescription
0x96 PASSWD If any other value is written in this field, all the other bit values are ignored.

Bit 7 – ENABLE Card Detect Enable

ValueDescription
0 Card detect disable, the ROM code does not use any card detect pin and directly tries to boot from the memory connected to the SDMMC controller.
1 Card detect enable, the ROM code checks the level of the card detect pin. If the level is 0, the ROM code tries to boot from the memory connected to the SDMMC controller. If the level is 1, the ROM code skips the SDMMC controller and jumps to the next interface in the boot sequence.

Bits 6:5 – PID[1:0] Peripheral ID

The peripheral ID of the PIO controller managing the card detect pin.
ValueDescription
0 PIOA
1 PIOB
2 PIOC
3 PIOD

Bits 4:0 – PIN[4:0] Card Detect Pin Index

The index of the card detect pin inside the PIO controller.