39.5.6 GFX2D Interrupt Disable Register

The following configuration values are valid for all listed bit names of this register:

0: No effect.

1: Enables the corresponding interrupt.

Name: GFX2D_ID
Offset: 0x14
Reset: 0x00000000
Property: Write-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
    IERRBERRRERREXENDRBEMPTY 
Access WWWWW 
Reset 00000 

Bit 4 – IERR Illegal Instruction Interrupt Disable bit

Bit 3 – BERR Write Access Error Interrupt Disable bit

Bit 2 – RERR Read Access Error Interrupt Disable Bit

Bit 1 – EXEND End of Execution Interrupt Disable Bit

Bit 0 – RBEMPTY Ring Buffer Empty Interrupt Disable Bit