58.6.6 Synchronous Serial Controller (SSC)

Timings are given in the following domains:
  • 1.8V domain: VDDIO from 1.7V to 1.95V, maximum external capacitor = 15 pF, DRV = 1, SR = 1
  • 3.3V domain: VDDIO from 3.00V to 3.6V, maximum external capacitor = 15 pF, DRV = 0, SR = 1
Figure 58-21. SSC Transmitter, TK and TF in Output

Figure 58-22. SSC Transmitter, TK in Input and TF in Output

Figure 58-23. SSC Transmitter, TK in Output and TF in Input

Figure 58-24. SSC Transmitter, TK and TF in Input

Figure 58-25. SSC Receiver RK and RF in Input

Figure 58-26. SSC Receiver, RK in Input and RF in Output

Figure 58-27. SSC Receiver, RK and RF in Output

Figure 58-28. SSC Receiver, RK in Output and RF in Input

Table 58-32. SSC Timings(2)
Symbol Power supply Conditions 1.8V 3.3V Unit
Parameter Min Max Min Max
Transmitter
SSC0 TK edge to TF/TD (TK output, TF output) – 0 3.8 0 5.5 ns
SSC1 TK edge to TF/TD (TK input, TF output) – 3.1 14.4 2.5 13.8 ns
SSC2 TF setup time before TK edge (TK output) – 12.8 – 12.3 – ns
SSC3 TF hold time after TK edge (TK output) – 0 – 0 – ns
SSC4 TK edge to TF/TD (TK output, TF input) – 0 3.8 0 5.5 ns
STTDLY = 0
START = 4, 5 or 7 2 × tCPMCK 3.8 + (2 × tCPMCK) 2 × tCPMCK 5.5 + (2 × tCPMCK) ns
SSC5 TF setup time before TK edge (TK input) – 0 – 0 – ns
SSC6 TF hold time after TK edge (TK input) – tCPMCK – tCPMCK – ns
SSC7 TK edge to TF/TD (TK input, TF input) – 3.1 14.3 2.5 13.8 ns
STTDLY = 0
START = 4, 5 or 7 3.1 + (3 × tCPMCK) 14.3 + (3 × tCPMCK) 2.5 + (3 × tCPMCK) 13.8 + (3 × tCPMCK) ns
SSC14 TK low or high time(1)

VTK > VIH or

VTK < VIL

 3 x tCPMCK + 1.5 – 3 x tCPMCK + 1.7 – ns
SSC15 TK rise time or fall time(1) 10% to 90% – 10 – 10 ns
Receiver
SSC8 RF/RD setup time before RK edge (RK input) – 0 – 0 – ns
SSC9 RF/RD hold time after RK edge (RK input) – tCPMCK – tCPMCK – ns
SSC10 RK edge to RF (RK input) – 3.5 15.8 3.0 15.2 ns
SSC11 RF/RD setup time before RK edge (RK output) – 13.3 - tCPMCK – 12.8 - tCPMCK – ns
SSC12 RF/RD hold time after RK edge (RK output) – tCPMCK – tCPMCK – ns
SSC13 RK edge to RF (RK output) – 0 4.9 0 6.5 ns
Note:
  1. SSC14 and SSC15 apply to RK when RK is selected instead of TK (SSC_TCMR.CKS = RK).
  2. The data provided in this table are extracted from circuit simulation results.