40.4.1 Clock
Synchronization module in the EMAC requires that the bus clock (MCK) runs at the speed of the macb_tx/rx_clk at least, which is 25 MHz at 100 Mbit/s, and 2.5 MHz at 10 Mbit/s.
Synchronization module in the EMAC requires that the bus clock (MCK) runs at the speed of the macb_tx/rx_clk at least, which is 25 MHz at 100 Mbit/s, and 2.5 MHz at 10 Mbit/s.
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