38.12 Register Summary - USB Host Pipe n Descriptor Bank 1

This Register Description section is valid if the USB is in Host mode (CTRLA.MODE=1).

Refer to the Registers Description section for more details on register properties and access permissions.

OffsetNameBit Pos.76543210

0x00

...

0x0F

Reserved         
0x10ADDR31:24ADDR[31:24]
23:16ADDR[23:16]
15:8ADDR[15:8]
7:0ADDR[7:0]
0x14PCKSIZE31:24AUTO_ZLPSIZE[2:0]MULTI_PACKET_SIZE[13:10]
23:16MULTI_PACKET_SIZE[9:2]
15:8MULTI_PACKET_SIZE[1:0]BYTE_COUNT[5:0]
7:0        

0x18

...

0x19

Reserved         
0x1ASTATUS_BK7:0      ERRORFLOWCRCERR

0x1B

...

0x1D

Reserved         
0x1ESTATUS_PIPE15:8        
7:0ERCNT[2:0]CRC16ERTOUTERPIDERDAPIDERDTGLER