10.1.8.12 MIPI D-PHY Characteristics

The SAM9X7 Series complies with the protocol and electrical specifications of the following standards:

Table 10-60. MIPI PHY DSI Characteristics
Symbol	Parameter	Conditions	Min	Max	Unit
V_DDIN33	Supply voltage range (VDDIN33)⁽¹⁾	–	3.0	3.60	V
I_DDIN33	Current consumption (VDDIN33)⁽²⁾	HS mode, 4 lanes	–	30.0	mA
t_START	Start-up time⁽³⁾	–	–	60	μs
High-Speed Characteristics
V_CMTXDC	Output common mode voltage⁽²⁾	–	150	250	mV
V_OD	Output differential voltage⁽²⁾	–	140	270	mV
V_OHHS	Output high voltage⁽²⁾	–	–	360	mV
Z_OS	Output impedance⁽³⁾	–	40	62.5	Ω
DZ_OS	Output impedance mismatch⁽³⁾	–	–	10	%
f_DSICK	MIPI_CLKx output frequency⁽³⁾	–	40	500	MHz
BR_LANE	Bit rate per lane⁽³⁾	–	80	1000	Mbps
Low-Power Characteristics
V_OH	High-level output⁽³⁾	–	1.10	1.30	V
V_OL	Low-level output⁽³⁾	–	-50	50	mV
Z_OLP	Output impedance⁽³⁾	–	110	–	Ω
t_RLP / t_FLP	15% to 85% rise time and fall time⁽³⁾	C_L < 70 pF	–	25	ns

Note:

This MIPI D-PHY must be powered by the 2.5V regulated output of the VDDOUT25 regulator, which is supplied from VDDIN33.
Lane load impedance is 80 to 125 Ω.
Simulation data

Table 10-61. MIPI PHY CSI Characteristics
Symbol	Parameter	Conditions	Min	Max	Unit
V_DDIN33	Supply voltage range (VDDIN33)⁽¹⁾	–	3.0	3.60	V
I_DDIN33	Current consumption (VDDIN33)	HS mode, 4 lanes	–	15.0	mA
t_START	Start-up time⁽²⁾	–	–	60	μs
V_IN	Recommended input voltage range⁽²⁾	On MIPI_CLKx and MIPI_Dx	-50	1350	mV
I_LEAK	Input leakage current⁽²⁾	On MIPI_CLKx and MIPI_Dx	-10	10	µA
High-Speed Characteristics
V_CMRXDC	Input common mode voltage range⁽¹⁾	–	70	330	mV
V_IDTH	Differential input high voltage threshold⁽²⁾	–	–	70	mV
V_IDTL	Differential input low voltage threshold⁽²⁾	–	-70	–	mV
V_IHHS	Input high voltage⁽²⁾	–	–	460	mV
V_ILHS	Input low voltage⁽²⁾	–	-40	─	mV
Z_ID	Differential input impedance⁽²⁾	–	80	125	Ω
f_CSICK	MIPI_CLKx output frequency⁽²⁾	–	40	500	MHz
BR_LANE	Bit rate per lane⁽²⁾	–	80	1000	Mbps
Low-Power Characteristics
V_IH	Input high level⁽²⁾	–	880	–	mV
V_IL	Input low level⁽²⁾	–	–	550	mV
V_HYST	Input hysteresis⁽²⁾	–	25	–	mV
V_IHF	Input high fault threshold⁽²⁾	–	450	–	mV
V_ILF	Input low fault threshold⁽²⁾	–	–	200	mV

This MIPI D-PHY must be powered by the 2.5V regulated output of the VDDOUT25 regulator, which is supplied from VDDIN33.
Simulation data