11.13.44 IPR5
| Name: | IPR5 |
| Address: | 0x367 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PWM2IP | PWM2PIP | TMR3GIP | TMR3IP | SPI2IP | SPI2TXIP | SPI2RXIP | |||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bit 7 – PWM2IP PWM2 Parameter Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 6 – PWM2PIP PWM2 Period Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 5 – TMR3GIP TMR3 Gate Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 4 – TMR3IP TMR3 Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 2 – SPI2IP SPI2 Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 1 – SPI2TXIP SPI2 Transmit Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |
Bit 0 – SPI2RXIP SPI2 Receive Interrupt Priority
| Value | Description |
|---|---|
| 1 | High Priority |
| 0 | Low Priority |