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11.13.39 IPR0
Peripheral Interrupt
Request Register 0| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | IOCIP | | CLC1IP | | CSWIP | OSFIP | HLVDIP | SWIP | |
| Access | R/W | | R/W | | R/W | R/W | R/W | R/W | |
| Reset | 1 | | 1 | | 1 | 1 | 1 | 1 | |
Bit 7 – IOCIP Interrupt-on-Change
Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
Bit 5 – CLC1IP CLC1 Interrupt
Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
Bit 3 – CSWIP Clock Switch
Interrupt Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
Bit 2 – OSFIP Oscillator Failure
Interrupt Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
Bit 1 – HLVDIP High/Low-Voltage
Detect Priority Flag
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
Bit 0 – SWIP Software Interrupt
Priority
| Value | Description |
|---|
| 1 |
High
Priority |
| 0 |
Low
Priority |
