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11.13.10 PIE3
Peripheral Interrupt
Enable Register 3| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | TMR0IE | CCP1IE | TMR1GIE | TMR1IE | TMR2IE | SPI1IE | SPI1TXIE | SPI1RXIE | |
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 7 – TMR0IE TMR0 Interrupt
Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
Bit 6 – CCP1IE CCP1 Interrupt
Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
Bit 5 – TMR1GIE TMR1 Gate Interrupt
Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
Bit 4 – TMR1IE TMR1 Interrupt
Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
Bit 3 – TMR2IE TMR2 Interrupt
Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
Bit 2 – SPI1IE SPI1 Interrupt
Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
Bit 1 – SPI1TXIE SPI1 Transmit
Interrupt Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
Bit 0 – SPI1RXIE SPI1 Receive
Interrupt Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
