21.9.5 TxCLKCON

Timer Clock Source Selection Register

Name:	TxCLKCON
Offset:	0xFBF,0xFB9,0xFB3


Bit	7	6	5	4	3	2	1	0
					CS[3:0]
Access					R/W	R/W	R/W	R/W
Reset					0	0	0	0

Bits 3:0 – CS[3:0] Timer Clock Source Selection bits

Table 21-3. Clock Source Selection
CS[3:0]	Clock Source
CS[3:0]	Timer2	Timer4	Timer6
`1111-1001`	Reserved	Reserved	Reserved
`1000`	ZCD_OUT	ZCD_OUT	ZCD_OUT
`0111`	CLKREF_OUT	CLKREF_OUT	CLKREF_OUT
`0110`	SOSC	SOSC	SOSC
`0101`	MFINTOSC (31 kHz)	MFINTOSC (31 kHz)	MFINTOSC (31 kHz)
`0100`	LFINTOSC	LFINTOSC	LFINTOSC
`0011`	HFINTOSC	HFINTOSC	HFINTOSC
`0010`	Fosc	Fosc	Fosc
`0001`	Fosc/4	Fosc/4	Fosc/4
`0000`	Pin selected by T2INPPS	Pin selected by T4INPPS	Pin selected by T6INPPS

Value	Description
n	See the “Clock Source Selection” table

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